This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCE913: CDCE913PW to be a VCO for video genlock

Part Number: CDCE913

Hello Team,

I have a very technical query relayed from my customer about how increasing and decreasing output frequency is done on this device. Please see the full description of customer's case below:

I have a certain video scaler IC which supports genlock function. It measures phase difference between V sync of source video with V sync of output video, then outputs a PWM signal accordingly. this PWM signal is fed through a buffer + voltage divider to CDCE913PW IC @ Vctr pin (tied to pull up resistor too). VDD=1.8v, VDDOUT=3.3v, crystal is 27MHz.

S0 is tied to 1.8v, while S1 and S2 to I2C lines. it uses Y1 and Y2 outputs (tied together) and feed this back into the IC itself as it takes the increase\decrease of frequency to achieve the genlock function.

my issue is that I failed to understand how CDCE913PW works in this case. I mean how to let it automatically increase\decrease its output frequency based on the input voltage explained above?

Thanks for your support.


Archie A.