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LMK04828: Zero Delay Mode / Nested Zero Delay Mode

Pavan
Intellectual 670 points
Part Number: LMK04828
Other Parts Discussed in Thread: LMK04832

Hi

I am using LMK04828 in Dual Loop Mode,

Input parameters : 

Clk_in 1 : 200 MHz

Oscin    : 122.88 MHz

Output parameters : 

Dclkout0 : 400 MHz

Dclkout2 : 200 MHz

Sdclkout2 : 6.25 MHz

I need Zero Delay mode or Nested Zero Delay mode in my application.

It would be great if you help me with the configurations.

  • 0
    TI__Mastermind 28540 points

    Hello Pavan,

    First I'd like to point out the resource Multi-Clock Synchronization app note.

    Have you downloaded and installed TICS Pro?  Please note the LMK04832 has a frequency planner that I suggest you take a look at to see if it can help you with your ZDM setup.  LMK04832 and LMK04828 are very similar to one another and that can guide you on how to configure the LMK04828.

    What are you trying to achieve by ZDM?  CLKin1 having deterministic phase to 200 MHz and 400 MHz?
      * Using ZDM with a 200 MHz input you will not be able to have deterministic SYSREF output using LMK04828.  You need to either provide a 6.25 MHz reference for ZDM with the 6.25 MHz SDCLKout2... I think this is a SYSREF output?

     * Alternatively, the LMK04832 supports resetting the PLL1 R divider which could then be done to have deterministic phase of the 6.25 MHz clock with respect to a sync event you provide meeting a setup and hold time to the 200 MHz reference.

    73,
    Timothy