Is it possible to output 1.2GHz LVDS clock with 1.2GHz LVDS clock input in distribution mode?(See 9.4.5 on page 55 of the datasheet)
At this time, does SYSREF also output?
Can I do the above actions if I input only the CLKin/Fin,CLKin1*/Fin* pin?
Do I have to input both the CLKin/Fin,CLKin1*/Fin* pin and the CLKin0,CLKin0* for the above operation?