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Undefined Jitter spec in CDCLVP1204 datasheet; Tsk,P

Other Parts Discussed in Thread: CDCLVP1204

The CDCLVP1204 datasheet give values for Part-to-part skew Tsk,PP and Output skew Tsk,O and later defines them in the data sheet in timing diagram figure.

It also gives value for Pulse skew Tsk,P and calls it Crossing-point-to-crossing-point-distortion but does not define further it in the data sheet. 

What exactly is Tsk,P and how does it relate to Tsk,O?  Are the two additive?

Thanks, Al...

  • Hi Alfred,

    Pulse Skew is defined as the difference between the propagation times tPHL and tPLH when a single switching input causes one or more outputs to switch.

    So, Pulse skew is unrelated to output skew and it is an indicator of output duty cycle distortion with respect to input clock duty cycle for a  non-PLL buffer.  In PLL based buffers, output duty cycle specs were given directly as it is independent of input clock duty cycle. Non-PLL buffer (assume no duty cycle correction circuit is implemented) can NOT correct duty cycle and output clock duty cycle depends on input clock duty cycle and pulse skew.

    Thanks,

    Firoj

     

     

     

  • Thanks Firoj,

    I am building a clock distribution tree with this family of parts and I want to calculate the worst case skew between any two end points.

    Is the calculation as follows:  Skew (max) A-B =  Tsk,pp (dev_2) +  Tsk,pp (dev_1) +  Tsk,pp (dev_3) +  Tsk,pp (dev_4)

    Basically the worst case addition of the Part-to-Part skews?  Do I also need to take into account the Tsk,p Pulse Skew?  Will this duty cycle distortion look like additional skew between the endpoints?

  •  

    Hi Alfred,

    Yes, you are right. Addition of part-to-part skew  along with additive jitter will provide you worst case skew.  You don't need consider pulse skew here.

    We have only typical additive rms jitter in the datasheet. You need here max p-p jitter. You can assume 5 p-p jitter for each buffer.

    Thanks,

    Firoj