Hello Support team,
After the process of Power on -> clock input to Vsync and Hsync -> I2C confutation
How long time is it required to make the output clocks (148.35MHz NT, 148.5MHz PAL) follow the input signals?
How long time is it required to make the output clocks lock to Vsync?
If you have min/typ/max value spec, please let me know.
If you don't have any spec, please share the actual measurement value.
Output clock : CLKOUT2
Register configuration : below
LMH1983 register.xlsx
Best Regards,
Hirokazu Takahashi