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CDCI6214: CICI6214 Phase Jitter

YEH ELVIS
Prodigy 40 points
Part Number: CDCI6214


Hello,

In our application. The ch1 is 50M AC-LVPECL, ch2 is 100M HCSL and ch3 is dual 25M LVCMOS. Input is 25M OSC.

For 50M AC-LVPECL. The chipset input criterion is <1ps@12k~20M, But our measure result around 1.5ps.

Can we get more lower phase jitter via optimization/Adjustment the CDCI6214 code??

Thanks 

  • +1
    TI__Mastermind 18070 points

    Hello,

    Can you send me the .tcs configuration file (In Ticspro, File - Save)?

    Regards,
    Hao

  • +1 in reply to Hao Z
    Prodigy 40 points

    0818_CDCI6214_V1.tcs

    Please see the .tcs file in attach

  • +1 in reply to YEH ELVIS
    TI__Mastermind 18070 points

    Hello,

    The configuration looks correct to me. It should be external reasons:

    1. Measurement method. Improper phase noise measurement can raise the phase noise floor. Two things to notice: (1) directly solder the SMA cable onto the PCB trace (peel the SMA, solder the inner conductor to signal trace and outer conductor to ground) (2) use low noise baluns. If there isn't any, simply measure single-ended phase noise. Remember to add DC block in order not to inject DC current into the PNA.

    2. If the above has been tried yet the noise floor is still high (10MHz and above phase noise, compared to the datasheet phase noise plots), then power source may be the reason. Try troubleshoot it with a cleaner power source (LDO).

    Regards,

    Hao

  • +1 in reply to Hao Z
    Prodigy 40 points

    I thinks the measurement method should be correct, because the 100MHz HCSL phase jitter is pass to PCIE gen3, 
    If can optimization/Adjustment the code to pass spec it’s better.

    we will try to debug on power source.

    in addition.

    Do you have 50Mhz AC-LVPECL phase jitter data? What’s the CDCI6214 capability on 50MHz AC-LVPECL(12k-20M)?

    Thanks

  • 0
    Prodigy 40 points

    Do you have 50Mhz AC-LVPECL phase jitter data? What’s the CDCI6214 capability on 50MHz AC-LVPECL(12k-20M)?

    Thanks

  • 0 in reply to YEH ELVIS
    TI__Mastermind 18070 points

    Hello,

    I don't have phase noise plot at 50MHz, but you can use equation 20logN to estimate the phase noise at 50MHz from the PN at another frequency. For example, if 10kHz PN @156.25MHz = -130dBc/Hz, then 10kHz PN @50MHz can be estimated as -130 - 20log(156.25/50) = -140 dBc/Hz. This way you can use the datasheet phase noise plots to estimate phase noise at other frequencies.

    Regards,

    Hao