Our system could drive the LVDS clock into the PLL clock input pins (pins 34/35 – CLKin1) while the part is unpowered. Our design is AC coupled, but even the 400mV of AC on LVDS violates the absolute max ratings for the part (if it’s unpowered). The datasheet says +/- 300mV (see below).
I really hate to respin my hardware just for this. Is there anything we can do to verify that this truly would be a damage level condition? Typically, I’m used to ESD diodes that have current handling specs, so some IC’s allow you to violate the input voltage rating if you can limit the current.
I see ratings of +/-5mA for the CLKin pin for instance.