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LMX2594EVM: What is the accuracy to which the PLL settles to, in particular in the full assist mode if that is any different.

Kevin Catlin
Prodigy 10 points
Part Number: LMX2594EVM

The system in design has a requirement to change frequencies relatively quickly.  I am trying to confirm this component will meet the specification I have on this which is to achieve the commanded frequency to 100Hz.  Does the part achieve this accuracy within the times listed on the data sheet, in particular, when using the full assist mode.

  • 0
    TI__Genius 12550 points

    Hi Kevin,

    In full assist mode, VCO calibration is bypassed and it needs to write the VCO core, VCO_DACISET and capcode to change the frequency after reading the register. Hence, if oy write correct values, it will lock to the required frequency without any accuracy issue.

    Please check if the following appnote on calibration can help you.

    Streamline RF Synthesizer VCO Calibration and Optimize PLL Lock Time (Rev. A)

    Regards,

    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Prodigy 10 points

    Will it lock within 100 Hz?

  • 0 in reply to Kevin Catlin
    TI__Genius 12550 points

    Kevin,

    We haven't tested it for very low step size but PLL should be lock for your case, if writing the correct registers value in full assist mode.

    Regards,

    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Prodigy 10 points

    The step may not be small, it may be a relatively large frequency step, but is there any reason to expect that the frequency will not arrive to the commanded frequency within 100 Hz?  (I had tried to find a +/- on the commanded frequency in the data sheet, but I could not).  I don't want to assume it will be exactly the commanded frequency is all.  (I am more on the digital control side of things, so this is a bit out of my area of knowledge and I may not be asking for what I am looking for exactly correct)

  • 0 in reply to Kevin Catlin
    TI__Genius 12550 points

    Hi Kevin,

    In full assist mode, VCO cal (digital cal) time is 5 usec, which will leave the frequency within +/-10MHz range. Later analog loop BW will settle the frequency within Hz range, whose settling time depends on the analog lock time. Hence to answer your question, the required frequency will settle within 100Hz but that time will depends on the analog lock time.

    Usually in the datasheet and measured lock time mentioned for the frequency settling within +/-10kHz range.

    Thanks!

    Regards,

    Ajeet Pal   

  • 0 in reply to Ajeet Pal
    Prodigy 10 points

    Is there a way to estimate the analog lock time?  If I can obtain an estimate, then I can challenge the requirement

  • 0 in reply to Kevin Catlin
    TI__Genius 12550 points

    Hi Kevin,

    For estimating the lock time based on loop filter BW, operating frequency, tolerance and other controlled parameters, you can use the PLLatinum Sim tool. Which would help to provide the calculated over all lock time and analog lock time.

    Ex. shown below:

    Regards,
    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Prodigy 10 points

    Still trying to decide what the answer is.  

    The response :

    In full assist mode, VCO calibration is bypassed and it needs to write the VCO core, VCO_DACISET and capcode to change the frequency after reading the register. Hence, if oy write correct values, it will lock to the required frequency without any accuracy issue.

    Seemed it answered the question, but, later threads indicated that the setting to the freq commanded was not achieved to full accuracy in the full assist mode within 5 usec , but rather some elongated time.  If this part cannot achieve an accurate frequency within 5 usec once commanded, is there an alternate part that can?

  • 0 in reply to Kevin Catlin
    TI__Guru* 81510 points

    Hi Kevin,

    This is an analog PLL/VCO, the VCO will only be able to lock to the reference clock in a closed-loop manner. 

    This device has 7 VCOs inside the chip. VCO calibration is used to find out which VCO at which capcode and DACISET is best suit for the frequency of interest. This is a coarse tuning. It relies on the PLL (in close loop) to fine tune the VCO to the exact frequency. As such, Vtune voltage may vary. For example, you have the VCO calibration done at 25C. Now the temperature has raised to 60C. You don't need to re-calibrate the device, Vtune will change to accommodate the temperature effect.

    I don't aware of any wideband synthesizer in the industrial can support 5µs lock time. A direct digital synthesis (DDS) device may be able to achieve this response time but I think it is not available at this frequency. 

    One possible approach is ping-pong two synthesizers, the switching time will be in nano-second range.