LMK05318: Register 14, HIST Bit description

Hi Jennifer,

when (under which conditions) does this HIST bit go high and when does it go low, please? 

Thanks and Best Regards,

Hans

Hi Jennifer,

what is causing the HIST bit to be triggered, please? According the documentation there is nothing mentioned that an update of the history data causes an interrupt.

Thanks and Best Regards,

Hans

Hi Hans,

The LMK05318 register manual describes the HIST bit; it is not located in the datasheet.

Hi Kia,

Can you please help elaborate on what causes the HIST interrupt to get triggered?

Regards,

Jennifer

Hello Hans,

Please reference section 9.3.7.4 Tuning Word History in the LMK05318B datasheet for a description of how the HIST bit is triggered. I have attached an image of this section below.

Basically, the tuning word can be updated from one of three sources depending on the DPLL operating mode:

a. Locked Mode: From the output of the digital loop filter when locked

b. Holdover Mode: From the final output of the history monitor

c. Free Run Mode: From the free-run tuning word register (user defined)

Regards,

Kia Rahbar