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LMK04832: LMK04832: Phase Noise 983.04MHz Worst value

Yoshinori NAKANE
Prodigy 10 points
Part Number: LMK04832

Dear Team,

Please advise what is the additive phase noise of LMK04832  in the frequency of 983.04MHz (VCO 2949.12MHz) .

I can find the value in the datasheet Figure 30 typical case. I want to confirm worst case value.

Offset freq.   100Hz, 1kHz, 10kHz, 100kHz, 800KHz,   1MHz, 10MHz, 20MHz, 40MHz, 100MHz

Y.Nakane

  • 0
    TI__Guru** 107030 points

    Hi Nakane-san,

    Clock phase noise (or jitter) does not have boundaries (i.e. maximum or minimum value) as clock jitter is a random jitter. 

    There are several parameters that affect the overall phase noise:

    1. VCXO phase noise in PLL1

    2. PLL2 noise floor

    3. VCO phase noise

    4. PLL2 loop filter design

    5. PLL2 output buffer noise floor (at offset >= 20 MHz)

    What is the customer's target phase noise requirement? We can use PLL Sim to make a quick estimation.