Hi Team,
We would like to ask your help regarding our customer's inquiry below.
We are programming the clockgen chip CDCI6214 through on-board FPGA. CDCI6214 programming procedure list the following three steps
1.Apply RESETN=LOW.
2.Apply REFSEL=MID (leave tri-stated)
3.Apply EEPROMSEL=MID (leave tri-stated).
Unfortunately RESETN, REFSEL and EEPROMSEL pins from the clockgen chip are not connected to the FPGA. When the FPGA is ON, they are connected as follows
RESETN - pulled high to 1.8V
RFSEL - pulles low through 4.75k ohm resistor
EEPROMSEL - pulled high through 4.75kohm resistor
Could this be a problem when trying to program the clockgen through EEPROM Direct Access. Because we are able to program the EEPROM directly without having to toggle RESETN and put RFSEL and EEPROMSEL in MID state. But the success rate of programming is not 100%. For every 10 boards we try to program only 7 gets programmed and the remaining 3 does not.
Regards,
Danilo