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LMK05028: PPS Validation timer issue

Cyril GAIROARD1
Prodigy 90 points
Part Number: LMK05028

Hello,

We are currently using LMK05028 to generate 122.88MHz in 3 loop mode with 20MHz TCXO and 48MHz XO from an 1Hz (GPS PPS).
We are facing issue to get the ref0 to validate.

I measured the PPS and the STAT0 output (with REF0 monitor div out div by 2). It's never stable, ref0 validation is unstable.

(PS: If i enable the 1-PPS Jitter threshold, ref0 never validate at all).


Could you help me out?

THanks you very much.

Cyril.
Please find attached the configuration file.6330.config.tcs

  • 0
    TI__Mastermind 28560 points

    Hello Cyril,

    I presume this is on a board you made vs. the EVM.  Can you share the schematic?

    So it looks like your div-by-2 signal is producing more transitions than expected.  I'm wondering if there is some extra noise riding on the 1 Hz signal that is triggering more transitions than there should be.

    Can you try
      1) Turn on the 50 ohm termination.  That may reduce some reflections/noise.
      2) Is it possible to low-pass filter the input?

    73,
    Timothy

  • +1 in reply to Timothy T
    Prodigy 90 points

    Hello,


    I found out the root cause, switching to 50% duty cycle on the PPS input solved the validation problem.
    The pll is now locked solid, just need some more work on frequency and phase lock threshold.

    Have a nice day!