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Dual fanout buffer 1:2 for 4 GBPS.

Other Parts Discussed in Thread: DS100MB203, DS64MB201, DS42MB200, DS40MB200

Hello

I have 2 lanes (each lane is a differential pair) which I need to duplicate each of them. so each lane will have 2 fully independent  outputs.

My application is VBO-HS video signals which can be from 0.6 gbps to 4 gbps. so I need very low skew especially between lanes. no modification or termination required, just duplicating the signal. think of it as exactly the same as HDMI and DP fanout or splitter ICs.

I saw TI part DS100MB203 which seems suitable but it is very pricey at ~ 15$ or so, I need it to be cheaper if exist.

I have microchip SY58606UMG part which is suitable but only one lane per IC which makes it a bit harder.

for your kind help.

thanks

  • Hello,

    this item seems good but I will have to check.

    I don't want it to process the signal or anything, is this the case here?

    I found these devices as well, which seem cheaper:


    DS42MB200

    DS40MB200

    what do you think?

    Also, I could not find your part purchasable from global suppliers in small quantities, what is the situation?

    It should have better or similar performance as THCV218 IC (and THCV217 too). I am worried about propagation delay since it is kinda big, the output should go to an HDMI transmitter IC which takes 8 lanes... 2 of which are from the fanout IC and the other 6 are direct. I want to ensure all of them don't suffer from any delay problem due to propagation\skew. can you elaborate on this?

    a more expensive solution is to have all 8 lanes go through fanout ICs to ensure all of them get the same delay but this is not acceptable here due to huge cost, unless you have a cheap solution which I don't think you find one.

    thanks

  • Hi Hossam,

    1). These devices are signal conditioning parts and are protocol agnostic. Meaning you can use these for HDMI, ethernet or etc. 

    2). Devices you mentioned are good candidates as well. Please contact TI sales for availability.

    3). What is important is lane to lane skew since ASIC or FPGA processing these HDMI lanes need to mux these together. Lane to lane skew on different channels is in order of under 40ps - this is way below a bit length at 4Gbps rates. Typically HDMI specifications require lane to lane to be in order of nanoseconds - allowing propagation of signals through cable and signal condition parts. 

    Regards,Nasser  

  • Hello Nasser,

    thanks for your support. for your item i guess i need to make "fanout" pin as 1, while sel0 and sel1 as 0 in order to make a fanout correctly right?

    while for DS40MB200, I need to make LB0A+LB0B+LB1A+LB1B all to be logic 1 to achieve the fanout, right?

    what is the difference between my suggested devices and your suggested device?

    I don't require any signal conditioning or modification, just proper fanout. my VBO-HS signal is routed as 100 ohms differential impedance and length matched between all lanes. Here is how they are hooked:

    ASIC -> AC coupling cap -> HDMI TX IC

    now I want the first 2 lanes to be like this:

    ASIC -> AC coupling cap -> TI fanout -> AC coupling cap -> HDMI TX IC.

    assuming length from AC coupling cap to HDMI TX IC for regular lanes (the other 6) is about 45mm... how should I route the first 2 lanes which go to the fanout IC as mentioned above? what lengths? since there will be some delay, should I make the length as short and direct as possible to compensate? very hard to judge.

    as for skew and propagation delay, your part says 27ps for lane-to-lane and 35ps for part-to-part. please explain the difference and which one should I consider here.

    DS40MB200 has pulse skew of 20ps, part-to-part skew of 500ps, and output skew of 200ps. it seems a lot worse than your suggested part. please explain these skews.

    DS40MB200 is cheaper than DS64MB201 but I need verification that it will work at 4 gbps (effectively about 3.7 or so).

    I thought HDMI and similar receive everything at the same time as they process it... but you mentioned that it takes all data then de-serialize it internally so it had to wait until all lanes gather. correct? therefore we can get away with 2 ns or so delay.

    as for buying them, i need them to be available at regular global suppliers such as digikey and mouser when the time comes since my PCB house will purchase them.

    thanks

  • Hello

    I am still waiting your comment on this.

    for your kind follow.

    and sorry for reminder.

  • Hi Hossam,

    1). Please refer to each part's data sheet regarding data rate and other parameters such as skew. DS40MB200 and DS64MB201 both support 4Gbps you noted. There are pros and cons for each part. Based on your application requirement, you can select appropriate device. However, i am not an expert on HDMI specification. You may want to refer to the spec and ASIC or FPGA IP which is going to implement this specification. 

    2).  After device selection, please note functional block diagram and truth table in the data sheet for appropriate logic for 1:2 mux operation. For example, for DS40MB200, as you noted correctly, you need to set LB0A, LB0B, LB1A, LB1B to low. 

    Regards ,, Nasser