LMK05028: XO input frequency

Hello Teritama-san,

In section 9.3.1, Oscillator Input (XO_P/N) says "For optimal performance, the XO frequency should be at
least 48 MHz and have a non-integer frequency relationship with the VCO frequencies so the APLLs operate in
fractional mode."

The effect is that the APLL in-band noise may be higher.  Minimum APLL noise is achieved when VCO / APLL phase detector frequency is minimized.  Note we do have a frequency doubler on the XO input which allows the APLL phase detector to be twice the XO input frequency.  This does increase the XO noise contribution, however it is typically not the dominant noise source vs. in-band APLL noise.

However, you have proposed a 25 MHz XO input and have requested 100 MHz output this will result in a violation of the non-integer frequency relationship.  The VCO frequency will be the least common multiple of (100 MHz and 125 MHz) * n = 500 MHz * n.  This VCO frequency will always be divided by 25 MHz (or 50 MHz).  It would be possible however to use for example 20 MHz XO input.  See below.

When using TICS Pro LMK05028 profile to configure a profile, please be sure to refer to section 10.2.2 in the datasheet, the detailed design procedure.

Of note, when configuring the GUI for 161.1328125 MHz from PLL1 and 100 MHz/125 MHz from PLL2 .  The resulting VCO frequencies are 4833.84375 MHz for PLL1 and 5500 MHz for PLL2.  These meet the non-integer requirement.  Because you will probably use the doubler on the XO input, calculate the ratio of 40 MHz (20 MHz doubled) to each VCO frequency,

PLL1: 4833.984375 / 40 = 120.849609375.  This is not integer and more than 0.1 away from an integer boundary.  Good
PLL2: 5500 / 40 = 137.5.  This is not integer and more than 0.1 away from an integer boundary.  Good.

If the frequencies were flipped, the default calculated VCO frequencies are 5000 MHz for PLL1 and 5639.6484375 for PLL2.
PLL1: 5000 / 40 = 125: Bad, this is not integer
PLL2: 5639.6484375 / 40 = 140.9912109375: Bad this is closer than 0.1 to an integer boundary.

Now it is generally possible to shift the VCO frequency within the range by steps of the LCM of output frequencies assigned to the VCO, VCO1 range is 4800 MHz to 5400 MHz and VCO2 range is 5500 MHz to 6200 MHz.

73,
Timothy

Hello Teritama-san,

The LMK05028 is not able to properly operate with an APLL VCO / XO = integer.  Since 25 MHz XO will always have an integer result relationship to VCO for the 100/125 MHz outputs for LMK05028, it becomes more of a performance issue.  The DPLL may not cross the integer boundary.  However newer products such as the LMK5C33216 can cross the integer boundary.

• So it is not possible to use the DPLL function with 25 MHz XO to produce 100 MHz and/or 125 MHz due to DPLL not being able to command the APLL to cross an integer boundary.
• The DPLL in a product like LMK5C33216 can command the APLL to cross an integer boundary.  There will be an increase in noise from spurs relating to the integer-boundary-spurs.
• However, if your 100 MHz or 125 MHz does not require tracking to the DPLL reference input, then you may use 25 MHz and operate the APLL in integer mode.  This may actually give you the best possible 100 MHz or 125 MHz performance.

When using 25 MHz XO for 161.1328125 MHz there are no such troubles using the DPLL to lock the 161.1328125 MHz to the DPLL reference and could be paired with the other APLL operating in free-run (based on XO ppm accuracy) to generate 100 MHz and 125 MHz.

For example it is possible to configure...
VCO1 = 4833.984375 MHz for 161.1328125 MHz and /50 = 96.6796875.  A good VCO/XO relationship, or
VCO2 = 5639.6484375 MHz for 161.1328125 MHz and /50 = 112.79296875.  A good VCO/XO relationship.

73,
Timothy