LMX2594: VCO Phase Sync and spurs

Hi Mike,

Can you please share the .tcs config file used in your setup? I can quickly check in my setup and see the performance.

Meantime, here are two important points in sync mode:

1) if you are at 1.785GHz, select BOTH output to show as channel divider. Your PFD spur suppose to go back down.

2) For divided frequencies: you can reduce the PFD_DLY_SEL along with MASH_order. this will reduce the spur. 

Thanks!

Regards,

Ajeet Pal

Hello Ajeet,  Attached are .tcs files and their resulting spectrum analyzer screens.  Both outputs were set to Channel Divider.  The three trials with sync correspond to 1st, 2nd and 3rd order MASH and their optimal PFD_DLY_SEL.  As you can see, the 40 MHz spurs are minimally affected for all MASH settings.  Best regards,  Mike

  1785 nosync.tcs1785 sync 1st order.tcs1785 sync 2nd order.tcs1785 sync 3rd order.tcs

Hello Michael,

Thanks for your info, Ajeet will update you.

73,
Timothy

Hi Michael,

I can see the same performance with phase sync enable mode in LMX2594EVM.

The phase sync affect the spurs most with higher loop filter BW and lower PFD frequency.

To improve the PFD spurs, you need to optimize the loop filter BW at fixed lower PFD frequency (40MHz). You can use the PLLatinum sim tool to optimize the loop filter BW and changed components on board.

Below plot without phase sync enable.

Below plot with phase sync enable (Mash order - 3rd, PFD_DLY_SEL - 4) with optimized loop filter BW (~90kHz).

Thanks!

Regards,

Ajeet Pal

So, I hear you saying, yes, Phase Sync does raise fpd spurs by 20 dB and all I can do about it is improve loop filtering.   

Next question, where'd the -45 dBc spurs at +/- 2.5 MHz in your screen shot come from?    I'm seeing similar degradation with Phase Sync at other frequencies.  Attached is my 1700.5 MHz with -33 dBc spurs at +/- 1 MHz.  Not good!  

Mike

  1700.5 sync 1st order.tcs

Hi Michael,

That's correct, to improve the Fpd spurs, reduced loop filter BW should be used.

In previous test at 1785MHz, the large spurs are with higher mash order (3rd) and those can be reduced by reducing the Mash order.

Regarding the higher spurs at +/-1 MHz offset on 1700.5MHz frequency are the primary fractional spurs occur at multiple of 500kHz offset. Same can be observed in PLLatinum Sim tool also, shown below.

Here is the link for Fractional N PLL concepts to know the various spurs frequencies. 

Regards,

Ajeet Pal

But when I uncheck the Phase Sync box the spurs vanish.  See attached.  I conclude the Phase Sync feature and fractional N operation don't play well with each other.  What am I missing??  -  Mike

Hi Michael,

That's true. When phase sync mode is disable, spurs are goes down.

Please allow me some time, I'll check from the design side, why phase sync enable and fractional pll affects the spurs more.

Regards,
Ajeet Pal

Thanks, Ajeet.  Backing up a bit, what changes did you make to reduce the 40 MHz Fpd spurs?  My loop filter is presently the same as the Eval Board.  

Best regards,

Mike