Hello Team,
My customer has a design where they take in 18.75 MHz over LVDS and they want to generate 3 LVDS clocks at 18.75 MHz, 75 MHz and 150 MHz. All of these clocks including the input clock must have the same (+/- 200ps) phase relationship every time the part powers on. The outputs also should be low jitter (< 200 ps)
Could you steer me toward the best choice(s)?
Regards,
Renan
