Hi Team,
Could you provide following info if you have any data?
1. Parasitic input capacitance on CLKIN pin
2. How large CL can LMK1C1106 drive properly?
Regards,
Takashi Onawa
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Hi Team,
Could you provide following info if you have any data?
1. Parasitic input capacitance on CLKIN pin
2. How large CL can LMK1C1106 drive properly?
Regards,
Takashi Onawa
Hi team,
Sorry, less of word for No1 question.
My customer wants to know estimated Max cap at the pin. Typ value, 7pF, is only defined on the datasheet.
Regards,
Takashi Onawa
Hello Takashi,
Regards,
Kia Rahbar
Hi Kia-san,
Thanks for your prompt response on this.
My customer plan to provide the clock to the device which is 200~300mm far away.
In my quick estimation, its parasitic cap will be around 15~20pF for 50ohm single Z0 though, what kind of side effect will be come out due to such the large parasitic cap?
Can't LMK1C1106 drive such the large load cap properly?
Regards,
Takashi Onawa
Hello Takashi,
The LMK1C1106 can drive a large parasitic capacitance, but you will be susceptible to reflections or signal degradation at the input. With that being said, a series resistance (Rs) can be placed at the input to improve signal quality.
Regards,
Kia Rahbar
Hi Kia-san,
Thanks for your prompt response on this.
My customer is a little bit confused since you recommended 5pF CL in previous replay.
Could you tell me the back ground of 5pF CL is recommended normally?
Regards,
Takashi Onawa
Hello Takashi,
A CL of 5 pF is recommend as our device characterization measurements were taken with a CL of 5 pF. Using a CL of 5 pF will result in the best device performance.
Regards,
Kia Rahbar