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LMK04828: Two LMK04828 synchronization

ttd
Mastermind 8000 points
Part Number: LMK04828

Dear Technical Support Team,

I'd like to use two LMK04828 and synchronize between output clocks as much as possible.

My idea is to input one oscout (buffered LVDS) into the other clkin0 or clkin1.

Since ADC and DAC compatible with JESD204B are not used, LMK04828 is used as a clock generator, and SYNC and SYSREF are unnecessary.

See attached two tsc files and clock tree(pdf). Could you check the settings of LMK04828?

If you have reference design to synchronize between two LMK04828EVM , could you share it?

LMK04828_OSCin10MHz_ADC_FPGA_2022.01.07.tcs

LMK04828_OSCin10MHz_DAC__2022.01.07.tcs

0624.LMK04828_clktree.pdf

Best Regards,

ttd

  • 0
    TI__Genius 12560 points

    Hi TTD,

    Apologize for delayed response.

    There are various ways to synchronize the multiple LMK devices and have reference designs TIDA-01023 (Tree configuration) and TIDA-01024 (Daisy chain configuration) FYR.

    But I could see in your proposed architecture both LMKs have different output frequencies, are they still need to be synchronize (any specific case)? or can it be deterministic?

    With the proposed architecture, OSCout bypass for next LMK, you can have deterministic as OSCout doesn't have delay adjustment. But if the same frequency clock provide from DCLKout, which has delay can generate synchronized output with sync from LMK-1.

    Multi-clock synchronization has different condition (like zero delay mode) can be seen in the Multi-clock synchronization app note.

    Both LMKs have very low phase detector frequency, which would affect the phase noise / jitter performance of clock output. Hence based on ADC/DAC clock requirement, need to increase the phase detector frequency (OSCin also) to achieve the required performance.

    Once you finalize the architecture, will update the configuration files.

    Thanks!

    Regards,

    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Mastermind 8000 points

    Hi Ajeet Pal,

    Thank you for your reply.

    >But I could see in your proposed architecture both LMKs have different output frequencies, are they still need to be synchronize (any specific case)? or can it be deterministic?

    →I 'd like to make synchronization of two LMK output clock  as deterministic as possible.

    >With the proposed architecture, OSCout bypass for next LMK, you can have deterministic as OSCout doesn't have delay adjustment.

    >But if the same frequency clock provide from DCLKout, which has delay can generate synchronized output with sync from LMK-1.

    ⇒Does it mean following configuration?

        I'll change OSCin frequency from 10MHz to 125MHz for VCO=2500MHz and high phase detector frequency.

        Should I use SDCLKout(SYNC signal) for nest LMK? If yes, what frequency is better.

        If you have tcs file for TICS pro, it is helpful for me.

        

        

    P.S

    I have two LMK04828EVM and will test before building board.

    Best Regards,

    ttd

  • +1 in reply to ttd
    TI__Genius 12560 points

    Hi TTD,

    Apologize for the delayed response.

    ttd said:
    →I 'd like to make synchronization of two LMK output clock  as deterministic as possible.

    Yes, while having the reference signal to 2nd LMK from OSCout of the 1st LMK, you could have deterministic skew between the clocks out from both device in daisy chain configuration. 

    As mentioned above, OSCout doesn't have delay adjustment so LMK-2 has a fixed delay (deterministic) between input reference signal and reference signal input  at LMK-1. 

    ttd said:

    ⇒Does it mean following configuration?

        I'll change OSCin frequency from 10MHz to 125MHz for VCO=2500MHz and high phase detector frequency.

        Should I use SDCLKout(SYNC signal) for nest LMK? If yes, what frequency is better.

    If multiple LMKs used in tree configuration, they can get the external SYNC and synchronize the LMKs. But in daisy chain configuration, they suppose to be used in zero delay mode for deterministic outputs. Hence for zero delay mode, reference frequency should be same as minimum output frequency of the system. In this case, OSCin frequency should be 39.0625MHz.

    Below are the TICS Pro config files for both LMKs to operate with available EVMs.

    LMK04828_1_ZDM.tcsLMK04828_2_ZDM.tcs

    Thanks!

    Regards,

    Ajeet Pal