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LMK05028: 9.5.5 General Register Programming Sequence

Hideki Hayashi1
Expert 8390 points
Part Number: LMK05028

Hi 

When I see 9.5.5 General Register Programming Sequence in the rev.A datasheet, I have some questions. Please support following three questions. 

At fourth sequence, "Write the register settings from lower to higher addresses (R0 to R647) while applying the following register mask (Do not modify mask bits = 1):"

I think R785 is the last register LMK05028 has, why to write until R647?

The word "mask" means the bits with masked as 1 do not be modified, for example, Mask R12 = A5h means R12[7],[5],[2],[0] must not be written, correct?

At sixth sequence, "Write 1b to R12[7]) to begin normal device operation (starting with VCO calibration and PLL start-up)"

[7] is same with fifth, did this want to mention "Write 1b to R12[0]" ?

Best regards,

Hideki

  • 0
    TI__Mastermind 20900 points

    Hi Hideki-san,

    1. the registers after R647 are Reserved and should not be changed or are status registers with read only function. Therefore those registers should not be written.

    2. the bits from the mask should not be modified. Most of the time they should be written as '0' except the default value of the masked bit is '1'. 

    3. there is a typo in the datasheet it should be like this:

    5. Write 1b to R12[7] to assert soft-reset. This does not reset register values.

    6. Write 1b to R12[0]) to begin normal device operation (starting with VCO calibration and PLL start-up).

    I have noted that typo in our document update repository that it will be changed with the next update. Thanks for pointing that out.

    Regards,

    Julian