Other Parts Discussed in Thread: TMS320C6657
Hey team,
Couple questions:
If I initialize the LMK03318 clock generator in LVCMOS mode with the outputs on channel 0 disabled (I believe the outputs will tristate in LVCMOS mode), can I then transition them to LDVS mode, and if so what are the consequences of that operation?
The second thought I had regarding the LMK03318 is not powering the VDDO_x pins of the output channels going to the DSP until I bring up the CVDD of the DSP, is that a possibility with the clock generator chip?
If it's helpful information, the DSP is the TMS320C6657
Thanks,
Cameron