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Original question:

LMK04208: PLL chip is used to lock the output clock signal of 0.5Mhz~1.5Mhz

LMK04208: I need to distro and then clean up a 10 MHz Is this a suitable part?

Lou Faustini
Prodigy 90 points
Part Number: LMK04208
Other Parts Discussed in Thread: LMK05318, LMK04832

Hello. 

    I have read the data sheet for the LMK04208 IC and download the 

TICS pro software. I think that this part is suitable for the job that I have

but I would like to verify this. I am more than a little confused by the

TICS software and the data sheet.

   In the system I have I have a I have a very high quality (low phase noise

and very high accuracy) 10MHz clock that needs to feed many remote

devices. The remote devices are 10 to 20 feet away in a fairly harsh (noisy)

environment, with severe ground loop issues.  My plan is to AC couple the

10 MHz (I cannot have a common ground) send it over coaxial cable, and 

then receive it at the end with some electronics and then send it to a LMK04208.

This transmission system will certainly degrade the phase noise of the original

clock, so I want to use the LMK04208  as a "clean up" tool.

I want to make / put a board at the remote locations to receive

this (now noisy and jittery) clock, and  clean it back up to a very

high quality 10MHz signal to be used in close proximity.  Is this

chip suitable for this problem, and can it operate with a 10MHz

input reference and can it generate a 10MHz output? Is this the

right chip for the job? is therea better choice? It seemed that the

LMK05318 would be a better choice (with its built in BAW) but

there is zero stock anywhere on that part and this is a fast moving

project. 

   The TICS software lets me plug in values for input and outputs and

such, and does not seem to complain about my choices, but I am 

not sure (and I don't get a good feeling that) it is checking for stupid / 

illegal choices. 

   Please advise, 

     ---Lou

  • 0
    TI__Mastermind 34270 points

    Hi Lou,

    LMK04208 should work for what you're trying to accomplish. It unfortunately doesn't have the most straightforward of our GUIs since it was developed a long time ago and ported into a different piece of software. Your absence of good feeling is well-calibrated - I can program for several illegal settings without the GUI warning me. TICS Pro does allow you to save a configuration (File -> Save) and E2E allows uploading these files. I'd be happy to take a look if you're uncertain about any settings.

    The strategy of LMK04208 is to substitute a low-noise VCXO with very low loop bandwidth in place of the noisy input reference frequency, yielding a higher-frequency reference for the second PLL's clock generator. As an example, you might configure the LMK04208 with a 100MHz VCXO and a 3000MHz VCO, then configure the output dividers to divide-by-300 to generate 10MHz. You won't necessarily get OCXO-quality 10MHz out of LMK04208, but it can generate 10MHz signals from the outputs for distribution with a 10MHz input.

    Arguably, all you really need is a single low-bandwidth PLL that can lock to a 100MHz VCXO, with some clock distribution on the output of the N-divider. While we can force the LMK04832 into a configuration like this, of course that device costs twice as much and there are none in stock; and we have no other dedicated devices with the combination of low-bandwidth PLL, external VCXO (or equivalent high-performance oscillator), and clock distribution, except as you mentioned LMK05318 and related which have no stock. Technically there is a reserved mode of LMK04208 with MODE = 0xF, which uses CLKin0 as the 10MHz reference and CLKin1 as the VCXO feedback instead of OSCin; this omits PLL2 entirely which should improve the phase noise for a 10MHz jitter cleaning and distribution-style application like what you describe. I can test this configuration and suggest a configuration (along with any caveats I discover) if you're interested.

    Regards,

    Derek Payne