• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 21 subscribers
  • Views 315 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCDB803: A Few quick questions

Cameron Perl
Expert 5375 points
Part Number: CDCDB803

Hey team,

Just a few questions regarding the 1:8 clock buffer!

  1. What is the common mode for clock input?
  2. If AC coupled, does it need to be biased?
  3. Does clock input have internal termination or not?

Thanks for your help,

Cameron

  • +1
    TI__Expert 8585 points

    Hello Cameron,

    1. The input voltage swing requirements are from 200 mV to 2.3 V

    2. No biasing is required as the termination type is LP-HCSL.

    3. The only internal termination for the clock inputs is a small input capacitance across the differential pair. The clock inputs are LP-HCSL differential clock inputs and are typically connected directly to the differential output of the clock source. 

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    TI__Expert 5375 points

    Hey Kia, quick clarification from the customer on the above questions.

    "I asked about input bias, but you repeated datasheet AC parameters.  Let me explain what I try to find out.  Input for CDCDB803 must be AC coupled due to different power domains.  Do I need to bias input of the CDCDB803 and to what value if yes?"

  • 0 in reply to Cameron Perl
    TI__Expert 8585 points

    Hello Cameron,

    There are no issues with AC coupling the input and no biasing is needed.

    Regards,

    Kia Rahbar