CDCE62002 - Thoroughly Easy Question to Answer by TI

shadders

Expert 1065 points

Hi,

I have just exmined the latest datasheet -

Figure 17 gives the Register setup - Data Bit 27 at Left, Data Bit 0 at Right, then 4 Address Bits at the Far Right.

Figure 18 indicates that BIt 0 is sent first, then Bit 1, and so on until Bit 31 is sent last.

Figure 21 indicates the Factory Programming. Register 0 = 72A000E0.

I assume the last byte "E0" is made up from "0" the Address Bits "0000" at the right, and "E" = "1110" where the "01" is LVPECL setting and "11" is Auto Select.

So you are reading backwards from Right to Left when you create the Hex numbers.

Hence my posts are all reading Left to Right, where the Left is Bit 0 transmitted first.

Regards,

Richard.

over 14 years ago

0 Firoj Kabir over 14 years ago

TI__Expert 4585 points

Hi Richard,

I checked your register settings

It looks like Register 0 and Register 1 have written in different format. Can you please confirm your register settings?

Thanks,

Firoj

0 shadders over 14 years ago in reply to Firoj Kabir

Expert 1065 points

Hi Firoj,

Thanks for the reply. I will continue this in another post.

As an explanation - i write down the bit sequence Left to Right, and then convert each Nibble to a hex character. I sent a word document last night - i think there is an error in figure 23 in the March 2011 datasheet - and in Table 6 bit 5. Bothy indicate that the setting of Bit 5 enables the REF_IN input - but your code in another post indicates this should be a 1. I set to a 1 as per your code - and i am now obtaining a a clock output.

Thanks and regards,

Richard.

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CDCE62002 - Thoroughly Easy Question to Answer by TI