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LMX2820EVM: SRREQ_P/N pins

Matteo Ricci
Prodigy 180 points
Part Number: LMX2820EVM
Other Parts Discussed in Thread: LMX2820, LMK1D2102, LMK1D1204, CDCLVC1102

Hi

we want to use the PLL LMZ2820 as a sysref generator.

I am attaching the TICS pro configuration file: the sysref frequency is about 39 MHz and it is generated from the internal VCO.

The generation of the sysref signal seems correct (see the attached measure).

But to generate this signal, the SRREQ pin needs to be HIGH. Why? The sysref comes out from the internal VCO and not from the SRREQ pins. 

What is the meaning of these pins?

Thank you in advance.

Best regards,

Matteo Ricci

CLK_5G_FPGA_312M5_SYS_REF_39M0625.tcs

  • 0
    TI__Mastermind 30100 points

    Matteo,

    I don't think the LMX2820 datasheet or TICS Pro profile does a good job of explaining this, but in master mode you still need to assert SRREQ high to produce a continuous SYSREF output or trigger the SYSREF pulse(s). In repeater mode, the SYSREF output is strictly a buffered copy of the SRREQ pin, with output edges retimed to the VCO.

    For reference:

    • CE is chip enable, needs to be high for the device to stay active
    • MUTE mutes the outputs
    • SRREQ is the SYSREF request pin, for activating continuous or triggering pulsed SYSREF in master mode, and for a buffered copy in repeater mode
    • PSYNC is the phase sync pin, for use when timing-critical synchronization is required

    Regards,

    Derek Payne

  • 0 in reply to Derek Payne
    Prodigy 180 points

    Hi,

    thank you very much for the fast answer.

    So, if i want to use the sysref from the internal  VCO, i can set the sysref in continuous or pulsed mode. It's correct?

    Some questions:

    1) What is the electrical connection for the SSREQ pins? 

    2) What is the electrical standard of the sysref output signal? (LVDS, LVPECL...?)

    Thank you in advance.

    Best regards.

    Matteo 

  • 0 in reply to Matteo Ricci
    TI__Guru* 86220 points

    Hi Matteo,

    Correct, this device supports both continuous and pulse mode sysref generation.

    The SRREQ pin can be configured to CMOS or LVDS. I noticed that you were not using the latest TICS Pro, please install the latest version. The GUI has the option to select SRREQ input format. There is one known bug with the latest TICS Pro, which has R64[14] default to = 1. Please manually change this bit to 0 if you need SYSREF. This problem will be fixed in next revision release.

    SROUT is a 700mV (single-ended) swing differential signal with internal 50Ω termination. 

  • 0 in reply to Noel Fung
    Prodigy 180 points

    Hi Noel,

    thank you for the answer.

    Can you suggest me a buffer 1:2 to distribute the sysref to two receivers?

    Thank you,

    Matteo

  • +1 in reply to Matteo Ricci
    TI__Mastermind 30100 points

    Matteo,

    I'd make a few recommendations:

    • For DC-coupling LVDS, the LMK1D1204 (1:4, but you can leave two outputs unused) or LMK1D2102 (2x 1:2 buffers, you can leave one half unused).
    • In case you need single-ended signals, the CDCLVC1102 could be used (though getting stock will be a challenge).

    Regards,

    Derek Payne