Hi,
We use CDCE813-Q1 as clock jitter cleaner. Both the input and output is a single ended clock and the frequency is 24.576MHz. The clock is used as the DSP reference clock.
1. For CECD813R02-Q1, after power up without controlling I2C and just pull up S0 pin, the Y1 is output enable. For this use case, does the jitter cleaned function take effect?
2. The jitter of Y2 and Y3 has been shown in the datasheet, what about Y1?
Hello,
If your input frequency (24.576MHz) is less than minimum VCO frequency (70MHz), you need to program the device and can write in EEPROM. For jitter clean it needs to operate in PLL mode (PLL enabled)
1. For CECD813R02-Q1, after power up without controlling I2C and just pull up S0 pin, the Y1 is output enable. For this use case, does the jitter cleaned function take effect?
Yes, CDCE813R02-Q1 part can enable the Y1 output by pulling up S0 pin and based on program, it does function as jitter cleaner.
2. The jitter of Y2 and Y3 has been shown in the datasheet, what about Y1?
For Y1 jitter, it suppose to be same as Y2 and Y3 mentioned in datasheet. but let me check with the responsible engineer if we have the jitter data available.
Thanks!
Regards,
Ajeet Pal
