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Original question:

LMK5B12204: I2C communication is abnormal about lmk5b12204

LMK5B12204: rising/falling time and I2C read back issue

Ben Kuo
Expert 7550 points
Part Number: LMK5B12204

Dear team,

We use LMK5B12204 and faced to below two issues.

1. Due to there are one board to board connector at LVPECL clock signal, customer faced to raising/falling time issue

> Did we have register can fine-tune driving capability to fix raising/falling time issue at receiver side?

2. We try to read register value by system I2C bus(not by TICS PRO).

And find that when read same register twice, only first time read back value meet design target.

2nd read back value is wrong, 

> We have check device behavior and behavior is not changed. So register value is not changed, but read back is wrong.

Did you have any suggestion to fix this two issues? thanks.

Regards,

Ben

  • 0
    TI__Expert 8585 points

    Hello Ben,

    1. Can you please provide me an image of your LVPECL terminations? A slow rise/fall time is due to improper termination.

    2. Can you please provide more details on how the readback is performed? Are the readbacks made immediately after each other? What are the commands used to perform the readback? Why do you need to read back the same register twice?

    Regards,

    Kia Rahbar

  • 0 in reply to Kia Rahbar
    TI__Expert 7550 points

    Hi Kia,

    Thanks, so we don't have register can fine-tune driving capability and need to modified termination to fix slew rate issue.

    Am I right? We don't prefer to change layout and want to know if we have solution by software.

    Regards,

    Ben

  • +1 in reply to Ben Kuo
    TI__Expert 8585 points

    Hello Ben,

    You are correct. The termination will be the primary factor in fixing the slew rate.

    Regards,

    Kia Rahbar