Hello,
When driving the CLKin0 with a singled-ended source with AC-coupling, the datasheet says to set CLKIN0_SE_MODE to 0 so that the component uses the differential buffer mode (P31, 9.3.1.3.2.). When I set it to differential mode (CLKIN0_SE_MODE = 0) the PLL1 never locks. Whereas when I set it to single-ended (CLKIN0_SE_MODE=1) it locks. Can you clarify what the datasheet asks please? Same with OSCin_SE_MODE.
Thank you very much,
Theo