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LMK04826: Application problem

Part Number: LMK04826

Hi team,

Customer puts forward some question. Would you please help me to answer Thanks a lot.

The holdover function of the LMK04826 has the following questions:
1. Where to set the entry and exit conditions of the hold state?
2. How to check the performance change of the hold state and the trend of output clock degradation?
3. Is there a time-length setting in the hold-out condition?

  • Hi,

    1. LMK04826 datasheet sections 9.3.7.2 and 9.3.7.4 shows the various ways to entering and exiting the holdover state.

    2. During the holdover, if PLL2 locks prior to entering the holdover then even after unlocking the PLL1 also, PLL2 still shows locks. Follow the section 9.3.7.3.

    3. Exit holdover depends on the various factors like VCXO frequency, ppm specs, PLL1_WND_SIZE and HOLDOVER_DLD_CNT. Follow the section 9.3.7.5 and 10.2.

    Thanks!

    Regards,
    Ajeet Pal