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CDCM6208: Any limitation for wait time for SPI communication when the PDN=high

Part Number: CDCM6208

Hello Team,

I have question about interface available timing when the power-up.
We are using manual PDN operation, it is high for PDN after the VDD stable.
When the PDN=high, we are using via SPI to configure register, is there had limitation for wait time for PDN to start SPI communication?
I think it needs wait time for charging REG_CAP if PDN= low will became internal LDO disable.

Best regards,

Sato