This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK03328: Clock Configuration

Part Number: LMK03328


I am using LKMK03328 for clock source.

I need 3-125MHz LVDS 

            2- 156.25MHz CML

             2-25MHz CML

            1-100MHz CML   clocks for my chips. I need hardware control Mode solution for this.

Clock Requirement

REFCLK0 25 MHz -100/+2000 ppm 1600 mV differential peak-to-peak common-mode input voltage is 0.7V upper voltage limit on singled-ended input of 1800 mV
REFCLK1 156.25 MHz  ±100 ppm 1600 mV differential peak-to-peak common-mode input voltage is 0.9V upper voltage limit on singled-ended input of 1100 mV
REFCLK2 156.25 MHz  ±100 ppm 1600 mV differential peak-to-peak common-mode input voltage is 0.9V upper voltage limit on singled-ended input of 1100 mV
REFCLK3 100 MHz  ±300 ppm 1600 mV differential peak-to-peak common-mode input voltage is 0.9V upper voltage limit on singled-ended input of 1100 mV
125 MHz  ±100 ppm 1000 mV differential peak-to-peak common-mode input voltage is 1.2V