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LMK05028: REFx frequency monitor fault is always active

maoyuan zhao
Prodigy 20 points

Part Number: LMK05028

Hi, TI team.

I had a few questions about frequency monitoring in reference input monitoring when I used LMK05028. The 8 outputs do not have a fixed phase difference with input clock (REF0). Until now, we find four status (PLL1 Lock Detected, PLL2 Lock Detected, DPLL1 Loss of Lock and DPLL2 Loss of Lock) are all normal. But REF0 frequency monitor fault is always active, which leads to DPLL1 and DPLL2 not work, while the other reference input monitors (such as amplitude monitor and so on) are all normal.

I tried to change ppm valid and invalid threshold (with register R219-R222, address 0xDB to 0xDE). And I also tried to disable REF0 frequency monitor (with register R189, address 0xBD). However, REF0 frequency monitor fault was still active no matter how I changed the threshold and whether it was disabled or not.

The questions are：

1.Should the REF0 frequency monitor fault be active when I disabled it?

2.How can I adjust ppm valid and invalid threshold and make it work?

Attached is my configuration file of TICs pro. Thank you and looking forward to your reply.

 lmk05028_config.tcs

  • 0
    TI__Genius 17025 points

    Hi Maoyuan,

    When you say the REF0 frequency monitor fault is still active, do you mean the LOR_FREQ=1?

    1. REF0 frequency monitor should not be active if disabled.

    2. For this, I will check your configuration next week.

    Regards,

    Jennifer

  • 0 in reply to Jennifer Bernal
    Prodigy 20 points

    Thank you for your reply.

    Actually, REFx frequency monitor fault is a status signal that can be assigned to STATUS[1:0] by register configuration according to the datasheet, as Fig 1 shows, and I measured the signal with an oscilloscope. So I said frequency monitor fault is always active in my question. I thought it is equivalent to LOR_FREQ=1.

    As you said, the frequency monitor should not be active if disabled. However, it was active though it was disabled. I tried to replace a new one chip in case this chip I used is broken. But it seems that the chip is not damaged and the problem has been not solved yet.

    Since the registers that control the enable and ppm valid/invalid threshold are not provided in the datasheet, I suspect the address of these two registers might be wrong. Please confirm these addresses when you check my register configuration file next week. 

    Thank you and looking forward to your reply.