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CDCLVP111-SP: Max/Min Vi for CLKPX in 3.3VLVCMOS case

Part Number: CDCLVP111-SP

Hello,

My customer would like to use CDCLVP111-SP for 3.3V LVCMOS input clock as described in Figure 8 in the datasheet.
They plan to bias CLKNX pin 3.3V/2.  But they can not find Vi min/max spec for CLKPX pin in the datasheet for 3.3V LVCMOS input case.
Can they refer to Vi specified as absolute maximum rating, -0.3V(min)/Vcc(3.3V)+0.5V(max) in their case?

Best regards,

K.Hirano