This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMX2594: Phase noise requirement- Reg

Part Number: LMX2594
Other Parts Discussed in Thread: LMK04828

Hello E2E team,

I am planning to use the PLL Synthesizer LMX2594 with reference clock from LMK04828B for generating output frequency of 5GHz and 10GHz  which is the sampling clock to Data Converter ICs.

Reference clock to LMK04828B PLL is 100MHz from OCXO O-CDFE028EW-P-R-10MHz/100MHz.

I have a very low phase noise requirement at 10Hz Frequency offset for this application.

But in datasheet everywhere i saw the Phase noise plot starting from 100Hz frequency offset.

Can you provide the Phase noise performance data with 10Hz frequency offset at output frequency of 5GHz and 10GHz.?

Please use any low phase noise reference clock for measurement and share the setup details.

Thanks in advance,
Sakthi

  • Hi Sakthi,

    10Hz offset is dominated by the reference clock, the phase noise at this offset from LMX2594 output at 5GHz to 10GHz will be equal to 20log(fout/100). 

    You can also use PLL Sim to do a phase noise simulation.

    BTW, please use OSCout from LMK04828 as the reference clock to LMX2594. DCLK out has higher phase noise than OSCout (because PLL and VCO add noise).