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CDCI6214: In/out config & synchronization

Part Number: CDCI6214
Other Parts Discussed in Thread: CDCE6214-Q1

Hi team,

I suggested CDCI6214 for generating I2S MCLK use-case as below

BCLK (3.072MHz, 1.8V) -> MCLK (BCLK*4 or *8 or *6, 1.8V)

Is it ok to use this device? I saw CDCS family but it supports only >8MHz input.

the second question is how to check the synchronization between in and out. Is it characterized by propagation delay (tpd_zdm), correct?

Best regards,


  • Hi Hayashi, 

    The input for CDCI6214 can be as low as 1 MHz and up to 250 MHz and can generate output frequencies as low as 44.1 kHz and as high as 350 MHz. 

    CDCE6214-Q1 has a minimum reference frequency requirement of 10 MHz and can generate output frequencies 44.1 kHz and as high as 328.125 MHz. 

    What is the input frequency? 

    To check synchronization, enable the synchronization for the respective output channels and you will see the outputs synchronized on a Oscilloscope.


    Zero delay mode is not a true zero delay, this mode is used when you require a deterministic delay between input and output even upon POR or in other words, every time you power cycle the device you will have the same delay.