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LMK04828: PLL2 no longer locking

Amy Panton
Prodigy 20 points
Part Number: LMK04828

We are using an LMK04828 as a clock distribution network in our Modem PCB. 

It has been working fine for months with no issues, full lock, stability and performance. 

Suddenly, the PLL now shows that it is unlocked (STATUS_LD1 and STATUS_LD2 are low). 

The expected outputs of the PLL are 12.5 MHz, 100 MHz and 400 MHz. The SPI register readback from the LMK (and cross checked with TICS Pro) confirms that these are the frequencies it should be configured to. However, measurements suggest that what is actually outputting is 13.5 MHz, 108 MHz and 430 MHz which suggests the device is indeed unlocked.

The input 50 MHz reference to the PLL was checked and confirmed to be stable with no degradation.

Voltage supply to the PLL was checked and confirmed to be correct with no supply ripple.

Readback PLL settings.tcs

Do you have any suggestions as to why this device would be working fine for so long but suddenly now be unlocked?

Are there any further checks we can do to help narrow down the root cause?

  • 0
    TI__Genius 10995 points

    Hello Amy,

    This could occur if the device is driven outside of it's spec limits. For instance, if the swing is too high which could lead to degrading the input stage or operating close to an absolute maximum ratings. It could also be a broken loop filter capacitor, broken input stage, etc; therefore, could you please answer the following questions?

    1) What environment is it in (i.e vibrations present? Temperature stress? Humidity present?)? At which temperature are you operating this device?

    2) Is the current consumption across the device still normal/within specs?

    I would also recommend testing the OSCin stage input by having the signal be outputted on OSCout.

    Thanks,

    Andrea

  • 0 in reply to Andrea Vallenilla
    Prodigy 20 points

    Hi Andrea, 

    Thank you very much for your response. I will try to answer your questions:

    1) This device underwent vibration as part of qualification of the PCB. Max accelerations the IC would have seen are as follows:

    Temperature of the IC would be max. 60C

    2) We could not measure the current consumption of the device as a test point was not accessible. However the 50 MHz reference input into OSCin is as follows:

    With Vpk-pk of 4.91V. It is not clear from the datasheet if this level of excursion would cause a problem?

    A schematic of the arrangement is below: 

    The LMK is driven by a Clock buffer (TI CDCV304TPWREP), and components labelled 'NF' are no fit.

    Please let me know if there is any other information I can provide to help debug this issue.

    Thank you.

  • 0 in reply to Amy Panton
    TI__Genius 10995 points

    Hello Amy,

    A few follow-up questions:

    1) Are any other devices in your system malfunctioning (such as the LMK losing lock)? 

    2) If you swap the LMK to a known-good board, does this issue persist?

    Thanks,

    Andrea

  • 0 in reply to Andrea Vallenilla
    Prodigy 20 points

    Hi Andrea,

    In response to the queries:

    1) There aren't any other devices in our system that are malfunctioning apart from a DAC that derives its clock from the LMK and is a direct consequence of the LMK losing lock.

    2) Unfortunately it is not currently possible for us to swap the LMK. However, we have 5 other identical boards that did not show this failure, and this board itself was working fine for several months before malfunctioning. 

    I hope that helps to try and further deduce a possible root cause of this failure. We are quite keen to understand if this could be a design/environment issue that over stresses the component and degrades its life.

    Thank you,

    Amy

  • 0 in reply to Amy Panton
    TI__Genius 10995 points

    Hello Amy,

    I will be reaching out to you via email by tomorrow so we can set up a call and further discuss this issue. I believe it'll be solved faster this way than continuing this thread.

    Thanks,

    Andrea