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LMK04806: the PLL can't be locked in the Dual loop mode

Part Number: LMK04806

hi TI expert 

i am using the LMK04806 in dual loop mode and  single PLL internal VCO. the status_LD pin is low, and has the clk output but the output is instable. could you please help on this?

 

R0 (INIT)	0x80160140
R0	0x00140300
R1	0x00140301
R2	0x00140302
R3	0x00140303
R4	0x00140184
R5	0x00140185
R6	0x02010006
R7	0x20020007
R8	0x01010008
R9	0x55555549
R10	0x1142410A
R11	0x83F1100B
R12	0x130C006C
R13	0x1B028A0D
R14	0x0200000E
R15	0x8000800F
R16	0xC1550410
R24	0x00110058
R25	0x02C9C419
R26	0xFFA9C41A
R27	0x1C00191B
R28	0x00100C9C
R29	0x0080031D
R30	0x0200019E
R31	0x001F001F

  • Hello Luo,

    I noticed three reasons why your PLL2 may not be locking. First off, in order for any PLL to lock, you have to choose a VCO frequency that's in between the ranges of the device (in this case, the internal VCO range is 2750 MHz to 3072 MHz). Since you picked a VCO frequency of 2400 MHz, that fell out of range, not locking your PLL. The other reason that your PLL2 is probably unlocked its because on the clock outputs page, for mode, you have it set for clock distribution in both the user controls and output tab instead of Dual PLL, internal VCO. I have attached my TICS Pro file with your use case (based on what I understood from your pictures) LMK04806_PLLUnlock_Dual.tcs

    In my file, you'll find I did not change the user controls from the default configuration. If you do need to change them feel free to do so, but do keep in mind if you are using CLKin0 and CLKin1, those 2 need to be enabled. If you would like more help, please include your .tcs file rather than pictures for me to better assist you.

    Good Luck,

    Andrea