Dear Texas team,
We want to know two things in LMX2492EVM module which is mentioned below,
1. What is the maximum chirp rate we can get in this EVM board?
2. What is the analog lock time of PLL in this EVM board?
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Dear Texas team,
We want to know two things in LMX2492EVM module which is mentioned below,
1. What is the maximum chirp rate we can get in this EVM board?
2. What is the analog lock time of PLL in this EVM board?
Hi Amit,
Loop bandwidth is over 400kHz.
For EVM information, please read the EVM user's guide. https://www.ti.com/lit/pdf/snau160
Theoretical analog lock time is approx. equal to 4 / loop bandwidth.
You can use PLL Sim to design the loop filter and simulate PLL performance. https://www.ti.com/tool/PLLATINUMSIM-SW
Hi Amit,
The ramp engine increments VCO frequency once every phase detector cycle.
Given the max. fpd = 200MHz. The max. ramp rate is also 200MHz.
Hi Amit,
The ramp engine can change VCO frequency every 5ns ( = 1 / 200MHz). If your application requires a 1MHz frequency change per ramp, then the chirp rate is 200kHz/ns.