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LMX2594: Can't get lock when VCO_PHASE_SYNC is enabled

Piotr Krysik
Prodigy 10 points
Part Number: LMX2594
Other Parts Discussed in Thread: LMK04208

I'm trying to synchronize clock phase at the output of two LMX2594 chips mounted on Xilinx/AMD ZCU111 evaluation board.

They have 122.88MHz signal at the input by default. At their outputs I want to create stable 3072MHz clock signals with constant phase relations.

According to documentation the clock is in category 1 and setting VCO_PHASE_SYNC=1 should do the job of syncing phases of the two LMX2594 synthesizers.

The thing is that for 3072MHz (but also any other output clock that I tried) the PLL of the chip can't get locked and the clock is evidently faulty. When VCO_PHASE_SYNC=0 there's no problem with lock.

Working configuration - VCO_PHASE_SYNC=0:

Working configuration - VCO_PHASE_SYNC=0

Faulty configuration - VCO_PHASE_SYNC=1 resulting with no lock:

What might be wrong in the second case (with VCO_PHASE_SYNC=1) so that LMX2594 can't get lock?

  • 0
    TI__Guru* 93670 points

    Hi Piotr,

    MASH_RESET_N bit should be set to =1. Please try again with this bit set to 1. 

  • 0 in reply to Noel Fung
    Prodigy 10 points

    I'd tried setting MASH_RESET_N to 1 before (I've seen your suggestion to do that in another thread). I've tried it again, but it doesn't help with getting lock and obtaining proper clock.

  • 0 in reply to Piotr Krysik
    TI__Guru* 93670 points

    Hi Piotr,

    If you already have the pll locked and then enable sync mode, it should remain lock. I have this verified in the lab.

    However, my board has difficulty in locking to the frequency after Vcc power up, I need to program R0 two times to get it locked.

    This problem was fixed by either making CAL_CLK_DIV = 1 (div2) or make ACAL_CMP_DLY to 16. These fixes mean that we need to slower down the VCO calibration speed. Please try if these fixes can resolve your problem.

    BTW, please keep MASH_RESET_N = 1 all the time. 

  • 0 in reply to Noel Fung
    Prodigy 10 points

    Hi Noel,

    I tried your advice: programming R0 twice, setting values of CAL_CLK_DIV and/or ACAL_CMP_DLY and kept MASH_RESET_N.

    I also tried to first program LMX with working configuration and then only program R0 and R36 registers to enable VCO_PHASE_SYNC.

    Still no luck. Without VCO_PHASE_SYNC everything works fine for all configurations that I test. Whenever I enable VCO_PHASE_SYNC chip indicates that there is no lock. I can see that on the signal that I get from ADCs: in normal situation it is sine wave, after enabling VCO_PHASE_SYNC it becomes random.

    If you are able to enable VCO_PHASE_SYNC and still have a lock, can you send me example configuration in TCS format?


    Is it possible that it is not fault of LMX2594 alone but of the way it is used on the ZCU111 eval boar that I have?
    LMX2594 chips take there input clock with default frequency 122.88MHz from LMK04208 chip.

    Could it be possible that LMX2594 has higher requirements for input clock quality when VCO_PHASE_SYNC is enabled?

    Thank you for your time.

  • +1 in reply to Piotr Krysik
    TI__Guru* 93670 points

    Hi Piotr,

    Were you using TICS Pro or your own software to program LMX2594?

    If you use your software, program R36 first, followed by R0. If you reverse this sequence, it would not lock. 

    If you use TICS Pro, this sequence is already taken care, I don't see why it does not work on your side.

    Attached is my TICS Pro configuration.

    2594.tcs

  • 0 in reply to Noel Fung
    Prodigy 10 points

    I'm using my own software write LMX2594 registers, but the sequence of register values to write to LMX2594 chips is taken directly from TICS PRO (it starts from register with highest address and end on address 0).

    I'm also adding one extra R0 write at the end.

    I don't know what might be wrong. I suppose there is something more than LMX2594 configuration that needs to be taken care of to solve this issue.

    If I solve this problem I'll report back here.

  • +1 in reply to Piotr Krysik
    Prodigy 10 points

    Hi Noel,

    I've found the reason for what is happening by examining everything what is sent to LMK04208 and LMX2594. Programming was done correctly but the code that I've written for reading lock status was not doing what it should.

    To read lock it is necessary to change MUX_OUT_LD_SEL bit in R0 register. But my code was overwriting other bits with incorrect values. It was writing 2414 no matter what was set in R0 previously. Therefore it was disabling VCO_PHASE_SYNC if it was enabled and disabled FCALC_EN. In case when VCO_PHASE_SYNC was 0 it wasn't a problem. But when VCO_PHASE_SYNC was enabled the LMX chips started to work erroneously.

    Many thanks for your advice as it made finding the solution much easier.