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Single Loop PLL without Integrated VCO Design Reg.

Other Parts Discussed in Thread: LMK05028, CDCM7005, LMX2485E

Dear Team,

Hi, I have a requirement of Phase locking 100MHz OCXO output (-130dBc@100Hz)  to a High stability 10MHz Clock source.

I was looking into the below parts,

1.LMK05028

2.CDCM7005

Can you please let me know if i can make use of the above mentioned or any alternate part. What would be the connections & measured output Phase noise of such implementation?

It would be greatly helpful if you could share any application note or design for Phase locking an OCXO with a PLL.

Thanks & Regards,

Deva

  • Hi Deva,

    I think you can simply use a PLL, such as LMX2485E, to lock the OCXO. You need to make the loop filter bandwidth less than 50Hz so that the phase noise at 100Hz won't get hurt. Active loop filter is recommended to eliminate the possibility of charge pump leakage due to frequency tuning pin of the OCXO. 

    To design the loop filter, you can use PLL Sim (www.ti.com/.../PLLATINUMSIM-SW).