The configuration of customer application LMX2491 cannot be completed. Please check whether there is a problem with the initial configuration program.
/* * lmx2491.c * * Created on: 2022��11��15�� * Author: DELL */ #include <stdint.h> #include "S32R274.h" #include "S32R274_features.h" #include "spi_app.h" #include "pin_mux.h" /* * ��Ҫʵ�������������ܣ� * 1�����üĴ�����24bit��MSB��0=д��1=����+15bit��ַ+8bit���� * 2���ض��Ĵ��������ڼĴ����Ļض�����ͨ��spi��MISO������ͨ��spi��MOSI�ܽŷ��͵�ַ����Ч����ռλ��Ȼ��ͨ��EN&CLK�������ⲿ�жϣ���ȡָ��pin�ĵ�ƽ�ź� */ static uint8_t gs_eirq5cnt; static uint8_t gs_cnt; static uint32_t gs_valueBit; /* * ���üĴ��� */ int LMX2491WriteReg(uint16_t f_addr, uint8_t f_value) { uint8_t value[3]; uint8_t temp[3]; int ret = 0; value[0] = 0; //д�����λ=0 value[0] = (f_addr >> 8) & 0x7F; value[1] = f_addr & 0xFF; value[2] = f_value; DSPI_UpdateCS(INST_DSPI1,0); status_t spiRetval = DSPI_MasterTransferBlocking(INST_DSPI1,value,temp, 3,100); if (spiRetval == STATUS_SUCCESS) { ret = 0; } else { ret = -1; } return ret; } /* * �������ɵ��ļ���ֱ��д */ int LMX2491WriteReg2(uint32_t f_value) { uint8_t value[3]; uint8_t temp[3]; int ret = 0; value[0] = (f_value >> 16) & 0xFF; value[1] = (f_value >> 8) & 0xFF; value[2] = (f_value >> 0) & 0xFF; DSPI_UpdateCS(INST_DSPI1,0); status_t spiRetval = DSPI_MasterTransferBlocking(INST_DSPI1,value,temp, 3,100); if (spiRetval == STATUS_SUCCESS) { ret = 0; } else { ret = -1; } return ret; } /* * ���Ĵ��� */ int LMX2491ReadbackReg(uint16_t f_addr, uint8_t *fp_value) { uint8_t value[3]; uint8_t temp[3]; int ret = 0; value[0] = 0x80; //�������λ=1 value[0] |= (f_addr >> 8) & 0x7F; value[1] = f_addr & 0xFF; value[2] = 0; //ռλ��û��ʵ������ //����Ƭѡ DSPI_UpdateCS(INST_DSPI1,0); #if 0 gs_eirq5cnt = 0; //����һ���ⲿ�жϣ�SPI1_EN SIUL2->DIRER0 &= ~(1UL << 17);//�����ⲿ�ж� PINS_DRV_ClearPinExIntFlag(5);//����жϱ�� PINS_DRV_ClearPinExIntFlag(17);//����жϱ�� SIUL2->DIRER0 |= (1UL << 5);//ʹ���ⲿ�ж� #else gs_cnt = 0; gs_valueBit = 0; SIUL2->DISR0 = 1UL << 17;//����жϱ�� SIUL2->DIRER0 |= (1UL << 17);//ʹ���ⲿ�ж� #endif //�ȴ�������ɣ�ͨ����ȡSPI״̬ status_t spiRetval = DSPI_MasterTransferBlocking(INST_DSPI1,value,temp, 3,100); //���ж� SIUL2->DIRER0 &= ~(1UL << 5);//�����ⲿ�ж� SIUL2->DIRER0 &= ~(1UL << 17);//�����ⲿ�ж� if (spiRetval == STATUS_SUCCESS) { ret = 0; //�����ݸ�ֵ *fp_value = (gs_valueBit>>16) & 0xFF; } else { ret = -1; } return ret; } #if 0 void SIUL2_EIRQ_0_IRQHandler(void) { // if(PINS_DRV_GetPinExIntFlag(5)) if( (SIUL2->DISR0 & (1<<5)) != 0U) //ʹ�ܴ���������idx=0�������ж�17 { gs_cnt = 0; gs_valueBit = 0; PINS_DRV_ClearPinExIntFlag(17);//����жϱ�� SIUL2->DIRER0 |= (1UL << 17);//ʹ���ⲿ�ж� //2���ر��ж� SIUL2->DIRER0 &= ~(1UL << 5); PINS_DRV_ClearPinExIntFlag(5); } else { PINS_DRV_ClearExIntFlag(); } } void SIUL2_EIRQ_2_IRQHandler(void) { // if(PINS_DRV_GetPinExIntFlag(5)) if( (SIUL2->DISR0 & (1<<17)) != 0U) //ʹ��¼�ܽ���Ϣ { PINS_DRV_ClearPinExIntFlag(17);//��� //���ܽ� gs_valueBit |= ((PINS_DRV_ReadPins(PTC) >> 11) & 0x01) << gs_cnt; //A15=PC[11] gs_cnt++; if(gs_cnt >= 32) { SIUL2->DIRER0 &= ~(1UL << 17);//�����ⲿ�ж� } } else { PINS_DRV_ClearExIntFlag(); } } #else void SIUL2_EIRQ_0_IRQHandler(void) { gs_cnt = 0; gs_valueBit = 0; gs_eirq5cnt++; SIUL2->DISR0 = 1UL << 17;//����жϱ�� SIUL2->DIRER0 |= (1UL << 17);//ʹ���ⲿ�ж� SIUL2->DIRER0 &= ~(1UL << 5);//2���ر��ж� SIUL2->DISR0 = 1UL << 5;//����жϱ�� } void SIUL2_EIRQ_2_IRQHandler(void) { SIUL2->DISR0 = 1UL << 17;//����жϱ�� //���ܽ� // gs_valueBit |= ((PINS_DRV_ReadPins(PTC) >> 10) & 0x01) << gs_cnt; //D14=PC[10] mux_out //��ʹ�ýӿڣ�ע��ߵ�λ��ת�����Զ���10������ʵ��ʹ�õ���15-10=5 gs_valueBit |= ((PTC->PGPDI >> 5) & 0x01) << gs_cnt; //D14=PC[10] mux_out gs_cnt++; } #endif int LMX2491Init(void) { uint16_t addr; uint8_t reg; #if 1 //1, ��ʼ�����мĴ�����ע������ĸ�out pin�Ĺ��� LMX2491WriteReg2(0x008D00); LMX2491WriteReg2(0x008C0F); LMX2491WriteReg2(0x008BA0); LMX2491WriteReg2(0x008A00); LMX2491WriteReg2(0x008900); LMX2491WriteReg2(0x008800); LMX2491WriteReg2(0x008700); LMX2491WriteReg2(0x008600); LMX2491WriteReg2(0x00850F); LMX2491WriteReg2(0x0084A0); LMX2491WriteReg2(0x008300); LMX2491WriteReg2(0x008200); LMX2491WriteReg2(0x008100); LMX2491WriteReg2(0x008000); LMX2491WriteReg2(0x007F00); LMX2491WriteReg2(0x007E0F); LMX2491WriteReg2(0x007DA0); LMX2491WriteReg2(0x007C00); LMX2491WriteReg2(0x007B00); LMX2491WriteReg2(0x007A00); LMX2491WriteReg2(0x007900); LMX2491WriteReg2(0x007800); LMX2491WriteReg2(0x00770F); LMX2491WriteReg2(0x0076A0); LMX2491WriteReg2(0x007500); LMX2491WriteReg2(0x007400); LMX2491WriteReg2(0x007300); LMX2491WriteReg2(0x007200); LMX2491WriteReg2(0x007100); LMX2491WriteReg2(0x00700F); LMX2491WriteReg2(0x006FA0); LMX2491WriteReg2(0x006E00); LMX2491WriteReg2(0x006D00); LMX2491WriteReg2(0x006C00); LMX2491WriteReg2(0x006B00); LMX2491WriteReg2(0x006A00); LMX2491WriteReg2(0x006900); LMX2491WriteReg2(0x0068C8); LMX2491WriteReg2(0x0067BF); LMX2491WriteReg2(0x0066FF); LMX2491WriteReg2(0x006585); LMX2491WriteReg2(0x006421); LMX2491WriteReg2(0x006340); LMX2491WriteReg2(0x006203); LMX2491WriteReg2(0x0061E8); LMX2491WriteReg2(0x006080); LMX2491WriteReg2(0x005F00); LMX2491WriteReg2(0x005E18); LMX2491WriteReg2(0x005D93); LMX2491WriteReg2(0x005C20); LMX2491WriteReg2(0x005B00); LMX2491WriteReg2(0x005A64); LMX2491WriteReg2(0x005980); LMX2491WriteReg2(0x005800); LMX2491WriteReg2(0x005700); LMX2491WriteReg2(0x005600); LMX2491WriteReg2(0x005500); LMX2491WriteReg2(0x005400); LMX2491WriteReg2(0x005300); LMX2491WriteReg2(0x005201); LMX2491WriteReg2(0x0051C0); LMX2491WriteReg2(0x005000); LMX2491WriteReg2(0x004F00); LMX2491WriteReg2(0x004EFF); LMX2491WriteReg2(0x004D40); LMX2491WriteReg2(0x004C00); LMX2491WriteReg2(0x004B00); LMX2491WriteReg2(0x004A00); LMX2491WriteReg2(0x004900); LMX2491WriteReg2(0x004800); LMX2491WriteReg2(0x004700); LMX2491WriteReg2(0x004608); LMX2491WriteReg2(0x004501); LMX2491WriteReg2(0x004400); LMX2491WriteReg2(0x0043C0); LMX2491WriteReg2(0x004200); LMX2491WriteReg2(0x004100); LMX2491WriteReg2(0x004003); LMX2491WriteReg2(0x003F00); LMX2491WriteReg2(0x003EA0); LMX2491WriteReg2(0x003D00); LMX2491WriteReg2(0x003C00); LMX2491WriteReg2(0x003B00); LMX2491WriteReg2(0x003A31); LMX2491WriteReg2(0x003900); LMX2491WriteReg2(0x002D00); LMX2491WriteReg2(0x002C00); LMX2491WriteReg2(0x002B00); LMX2491WriteReg2(0x002A00); LMX2491WriteReg2(0x002900); LMX2491WriteReg2(0x002800); LMX2491WriteReg2(0x002752); LMX2491WriteReg2(0x002642); LMX2491WriteReg2(0x002510); LMX2491WriteReg2(0x00244A); LMX2491WriteReg2(0x002341); LMX2491WriteReg2(0x002204); LMX2491WriteReg2(0x002120); LMX2491WriteReg2(0x002000); LMX2491WriteReg2(0x001F32); LMX2491WriteReg2(0x001E0A); LMX2491WriteReg2(0x001D00); LMX2491WriteReg2(0x001C1F); LMX2491WriteReg2(0x001B08); LMX2491WriteReg2(0x001A00); LMX2491WriteReg2(0x001901); LMX2491WriteReg2(0x001800); LMX2491WriteReg2(0x001700); LMX2491WriteReg2(0x001600); LMX2491WriteReg2(0x001580); LMX2491WriteReg2(0x001400); LMX2491WriteReg2(0x001300); LMX2491WriteReg2(0x00122C); LMX2491WriteReg2(0x001100); LMX2491WriteReg2(0x001025); LMX2491WriteReg2(0x000F00); LMX2491WriteReg2(0x000E00); LMX2491WriteReg2(0x000D00); LMX2491WriteReg2(0x000C00); LMX2491WriteReg2(0x000B00); LMX2491WriteReg2(0x000A00); LMX2491WriteReg2(0x000900); LMX2491WriteReg2(0x000800); LMX2491WriteReg2(0x000700); LMX2491WriteReg2(0x000600); LMX2491WriteReg2(0x000500); LMX2491WriteReg2(0x000400); LMX2491WriteReg2(0x000300); LMX2491WriteReg2(0x000201); LMX2491WriteReg2(0x000100); LMX2491WriteReg2(0x000018); #else LMX2491WriteReg2(0x00273A); #endif LMX2491WriteReg2(0x002341); LMX2491WriteReg2(0x002482); LMX2491WriteReg2(0x00258A); LMX2491WriteReg2(0x002692); LMX2491WriteReg2(0x00279A); //2���ض����мĴ��� // LMX2491ReadbackReg(0, ®); }