Hi,
I am using the CDCE72010 in a 120MHz application where I need 10 low jitter outputs and three different divide values.
We plan to use the VCXO inputs for the input 120MHZ and essentially ignore the reference inputs, feedback divider and charge pump functions.
We plan to use SPI mode, but the controller clock is derived from one of the CDCE72010 outputs. No clock -> no control.
I believe it is also possible for the part to be programmed through SPI in such a way that the output clocks can be off. This is a hazard to our design, since if an improper SPI command results in the controller clock being turned off, we are done.
We would like to have a hardware reset that can reload the device to know state with active clock outputs. From a description of the reset pin it sounds like this may not actually do this. i.e. we need to strobe reset to sync the various dividers, but when we do that we don't want to be back in power up state.
We can use a power monitor with watchdog function to reset the part. If the clock is off it would timeout and generate a reset.
Is there a way to do this?
Thanks.
