Other Parts Discussed in Thread: LMK1D1204
Dear team,
We are looking for 3 inputs to 1 output clock mux solution for PCIE gen5 application.
The similar solution I found is LMK00334 but only support two different inputs.
Did we have 3:1 clk mux solution for PCIE gen5(HCSL)?
or can we use two LMK00334 for 3:1 mux application? I would like to check if two additive jitter from LMK00334 can support Gen5 or not.
Regards,
Ben