This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCI6214: Questions of CDCI6214

Part Number: CDCI6214

Dear Team,

We connected the left Crystal in the figure below to XIN and Xout of 6214, and configured 22PF capacitors on the two pins of the crystal. Now we find that the crystal on some single boards cannot start to vibrate.
Our CDCI6214 firmware sets its Cxin_load to 5PF, as shown in Figure 3, it should be wrongly matched.

In the following formula, CL1 and CL2 are the matching capacitors on the crystal pins, Cic is the chip pins and internal capacitors, and Cstray is the capacitance of the wiring on the PCB:
CL = CL1 x CL2 / (CL1 + CL2) + Cstray+Cic

Now my question is:

1. How much is appropriate to estimate the wiring capacitance on the PCB? The wiring diagram is given on the right of Figure 1, and the line width is 5mil;
2. TICS provides a calculation method. Clext refers to a single value of CL1 or CL2, right? According to our schematic diagram, we configured it in Figure 4, please see if this configuration is correct?
Figure 1:

Figure 2:

Figure 3:

Figure 4:

Many Thanks,


  • Hi Jimmy, 
    1. I cannot say. PCB or stray capacitance is usually measured by a vendor. Usually after production the board is sent off to have this measured. I have seen 2-3 pF be very common for PCB capacitance but like I said, I cannot assure you that's the case here given this stray capacitance is measured by a 3rd party. 

    2. CL_ext usually refers to external load capacitance. 
    If you're XTAL is not resonating it's possible you're not driving it correctly. The datasheet for your xtal should how the nominal output frequency with the recommended bias current and recommended external load caps. You also don't want to risk overdriving 

    There is also an appnnote that goes in depth on XTAL oscillator based design:

    The calculator does work, it provides the optimal bias current and internal load capacitance. 

    Clext refers to a single value of CL1 or CL2, right?

    That is correct.