LMX2492: Additive jitter of Output R Divide/2

Christer Andersson

Part Number: LMX2492

Hi,

Using e.g. TRIG1_MUX it's possible to "Output R Divide/2". What's the additive jitter when using this divide functionality?

I need R/2 to clock some ADC:s and I'm thinking this feature of LMX2492 might save me from needing a separate clock divider IC.

Thanks,

Christer

over 2 years ago

0 Noel Fung over 2 years ago

TI__Guru** 107300 points

Hi Christer,

'Output R Divide/2' means, in this case, TRIG1_MUX output is a square wave clock, frequency is equal to fpd/2, clock source is coming from the reference path.

We've never verified the phase noise performance of this clock, what is your fpd frequency? We can do some test to see how good is this clock.

0 Christer Andersson over 2 years ago in reply to Noel Fung

Intellectual 290 points

Great!

I'll be using a 160 MHz input clock (most likely ABLJO-V-160.000MHZ) and I hope to get 80 MHz with low enough jitter output on e.g. TRIG1_MUX (or any equivalent MUX-pin, if there's a difference).

Sincerely,

Christer

+1 Noel Fung over 2 years ago in reply to Christer Andersson

TI__Guru** 107300 points

Hi Christer,

Here is the test result, I would say the output phase noise is not ideal.

Below is the comparison with the reference clock. The burred trace is the 80MHz clock from TRIG1. The active trace is the reference clock at 160MHz.

0 Christer Andersson over 2 years ago

Intellectual 290 points

Thank you for the thourough support. The jitter seems too high for my application, but now I can continue the design looking for a dedicated divider IC.

Clock & timing

Clock & timing forum

LMX2492: Additive jitter of Output R Divide/2