LMX2492: LMX2492 "hangs" after multiple reprogramming

Hi Yevheniy,

I don't know why the device behaves like this, we need to reproduce this observation in the lab before we can guess.

If you have SWRST = 1 in the beginning of your programming sequence, would that help?

Ok. please try to reproduce

Here is program listing:

;power down
    ldi r22,0x0
    ldi r23,0x2
    ldi r24,0x0
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

    ldi r21,0xff
    rcall delay
    ldi r21,0xff
    rcall delay
        
;soft reset
    ldi r22,0x0
    ldi r23,0x2
    ldi r24,0x4
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

    ldi r21,0xff
    rcall delay
    ldi r21,0xff
    rcall delay
    
;power up
    ldi r22,0x0
    ldi r23,0x2
    ldi r24,0x1
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

    ldi r21,0xff
    rcall delay
    ldi r21,0xff
    rcall delay


;cp gain and polarity
    ldi r22,0x0
    ldi r23,0x1c
    ldi r24,0x3f
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write
    
;reference divider
    ldi r22,0x0
    ldi r23,0x19
    ldi r24,0x1
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

;reference doubler
    ldi r22,0x0
    ldi r23,0x1b
    ldi r24,0x9
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

;cp_mon_low_thd
    ldi r22,0x0
    ldi r23,0x1e
    ldi r24,0x10
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

;cp_mon_high_thd
    ldi r22,0x0
    ldi r23,0x1f
    ldi r24,0x21
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write



;muxout config
    ldi r22,0x0
    ldi r23,0x27
    ldi r24,0x52
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write
    
;LD config
    ldi r22,0x0
    ldi r23,0x22
    ldi r24,0xa4;0x92;0x82;0x52
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write    
    

;Integer part high
    ldi r22,0x0
    ldi r23,0x11
    ldi r24,0x1
    brts f1inth
f1inth:
    ldi r22,0x0
    ldi r23,0x11
    ldi r24,0x1

    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write

;Integer part low

    ldi r22,0x0
    ldi r23,0x10
    ldi r24,0x46
    brts f1intl
    ldi r22,0x0
    ldi r23,0x10
    ldi r24,0x40
f1intl:    
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write



;Frac order
    ldi r22,0x0
    ldi r23,0x12
    ldi r24,0x30
    brts f1fracorder
    ldi r22,0x0
    ldi r23,0x12
    ldi r24,0x0
f1fracorder:
    
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write    
    
;Frac part denominator
    ldi r22,0x0
    ldi r23,0x16
    ldi r24,0x4
    brts f1fracdenominator
    ldi r22,0x0
    ldi r23,0x16
    ldi r24,0x0
f1fracdenominator:
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write    
    
;Frac part numerator
    ldi r22,0x0
    ldi r23,0x13
    ldi r24,0x1
    brts f1fracnumerator
    ldi r22,0x0
    ldi r23,0x13
    ldi r24,0x0
f1fracnumerator:
    ldi r30,0x16
    ldi r18,0x03
    rcall spi_write   

r22,r23,r24 are register data to send to LMX2492 MSB first

SPI clock frequency is about 1MHz

In this device we use 10MHz reference frequency.

Output frequency if 12800MHz or 13050MHz

We use divided output of HMC529 for PLL

PFD frequency  is 20MHz

Also on other devices we use double pll: 100MHz VTCXO locked to 10MHz external reference and LMX2492 pll locked to 100MHz. In this system we dont see such effect. Difference is that 100MHz is applied constantly to LMX2492, but microcontroller reprograms both plls if there is no lockdetect signal from one or both of them

Hi Yevheniy,

LMX2492 requires the external reference enable for lock detect (PLL locked) as you are seeing with 100MHz reference constant applied. Hence, try with the enable 10MHz external reference with sufficient power applied and it should lock the PLL.

Thanks!

Regards,

Ajeet Pal 

It seems You misunderstood. After "hanging" part doesn't react for applying reference signal.

We are using LMX2492 in VSAT BUCs. Situation with loss of reference signal is common, because it could be supplied from another place(building) and user potentially can disable reference signal to disable transmission. But in our case, when reference signal is supplied once again there will be no PLL Lock, because frequency synthesizer is non functional.

And other symptom is that LMX2492 has lockdetect signal high without real PLL lock when it "hangs"

Hi,

Thanks for clarifying the setup/scenario.

Please let's wait till, Noel can observe the issue in his lab and will update you on this. Stay tuned.

Thanks!

Regards,
Ajeet Pal

Hi. Are there any results from lab?

Hi Yevhenly,

I don't understand your programming information.

Is your programming sequence like below? 

1. Vcc power up

2. Program all the registers in Descending order. That is, R141, R140, R139, ..., R2, R1, R0

3. If lock detect is LOW (unlock), repeat Step 2. 

4. If lock detect is HIGH (lock), stop programming anymore.

Programming sequence:

R2=0x0  (powerdown)

R2=0x4 (soft reset)

R2=0x1  (powerup)

R28=0x3f

R25=0x1

R27=0x9

R39=0x52

R34=0xa4

R17=0x1

R16=0x46

R18=0x30

R22=0x4

R19=0x1

Hi Yevhenly,

I followed your programming sequence and configuration, except that R28=0x1F (positive charge pump) and R16=0xE0 (my VCO is 9600MHz), SPI speed is also 1MHz. After Vcc power up, without a reference clock, I program the device with this sequence and then wait 100µs and then repeat the sequence and wait time.

The total programming time, including the wait time, is 425µs. I let the programming run for a minute or couples of minutes, and then I apply the reference clock, I can see it is locked. The device does not hang up, I can still programming it. This is the expected result. I don't see any reason why the device will hang up with repeated programming. 

How many device has this problem? Could this be a power supply issue?