Dear Technical Support Team,
When this revision was changed to H, some register specifications were changed.
I have two questions about it.
Q1)
Regarding the initialization method, please explain in detail the reset time, release time, register setting values, and order of the initialization process that starts after the device is powered on or reset and released.
Q2）
The following is a list of the problem events. Is there any difference between FVH and STC?
■ Defect occurrence
The SDI signal of the board violates the standard.
TRS error occurs in the measurement device.
When temperature cycle test is performed, error occurs in a specific temperature band, although the value differs for each board.
Errors occur in a specific temperature band (temperature dependent).
(The error does not occur outside the specified temperature bandwidth.)
Occurs only on the 3G system (148M) (1080/59p)
Does not occur on HD system (74M) (1080/59i)
⇒Only occurs during GENLOCK
■Outline of Internal Operation
CLKOUT3 of LMH1983 is input as REFCLK of high-speed serial in FPGA.
It is PLLed inside the FPGA and its CLK is used in each block.
There are two input patterns to the LMH1983
(1).Input 27M to Hin (STC)
(2) FVH signal input to Hin, Vin, and Fin (at genlock)
⇒ (2) Problem occurs only when GENLOCK is selected.
No problem occurs in case (1) STC.
■Check when a problem occurs
・The LMH1983 lock signal is locked
・Switching from GENLOCK to STC eliminates the problem.
・Check that there is no disturbance in the CLKOUT waveform using an oscilloscope.
Best Reagrds,
ttd
