LMK03318: LMK03318 ROM mode setting

ST LOH

Part Number: LMK03318

HI,

This is related to prev case CS1525439

1. For ROM mode, the GPIO[5:0] = 24d = 0b011000, what is the value for REFSEL (2state)? The document stated REFSEL Vim =0.9V for SEFREF selection for 3state. How about 2 state ?

I am using a XO connected to SECREF.

SECREF_P/N = 50MHz XO(7M50072001))
GPIO5 = Low
GPIO4 = High
GPIO3 = High
GPIO2 = Low
GPIO1 = Low
GPIO0 = Low
HW_SW_CTRL = High
REFSEL = 0.9V ?? (Input mid voltage for the 3-level logic, this selects the secondary clock as the PLL preference)
PDN - connected to gnd via a 10nF

2. Can u verify if the above setting connection below can work when pwr on ? Expect when power on, auto generate diff clk output (OUTPUT0,1,2,3 = 156.25Mhz, LVDS, OUTPUT4,5 = 100MHz, LVDS). Any additional setting needed ?

rdgs

stloh

over 2 years ago

0 Kadeem Samuel over 2 years ago

TI__Mastermind 22210 points

stloh,

For selecting SECREF, RRESEL, a three level logic pin, should be set to VIM, or 0.9 V, as you noted. This can be a 1:1 resistor divider from 1.8 V down to 0.9 V. Alternatively, using R50[1:0] = 11b removes the need for VIM on REFSEL, per the table below:
When I powered on the LMK03318EVM in ROM mode with the settings that we have discussed (shown below as well), all outputs appeared as expected when their frequencies were measured. So long as REFSEL is set to VIM, there should not be an issue. I also tried this with REFSEL HI (PLL prefers primary) with no primary input connected, and the PLL runs from SECREF without any issues.

Thanks,

Kadeem

0 ST LOH over 2 years ago in reply to Kadeem Samuel

Prodigy 50 points

HI Kadeem,

Tx for the update. May i know what is the max current consumption with this setting ?

rdgs

stloh

0 ST LOH over 2 years ago in reply to Kadeem Samuel

Prodigy 50 points

HI Kadeem,

For the Output Muxe, is the PLL selection by default during the power on ? Or we need to program the device to enable the mux select PLL ?

rdgs

stloh

0 Kadeem Samuel over 2 years ago in reply to ST LOH

TI__Mastermind 22210 points

Stloh,

For ROM code 24, the PLL selection is based on REFSEL at power-on:

With regards to the current consumption, I will be able to have a response for you by tomorrow.

Thanks,

Kadeem

0 Kadeem Samuel over 2 years ago in reply to Kadeem Samuel

TI__Mastermind 22210 points

STLOH,

I have a suggestion for you - for the PDN header, you may want to increase the capacitor from 10 nF to as much as 0.47 uF - a low capacitance value can risk startup issues.

Thanks,

Kadeem