Hi Expert,
my customer is using CDCLVC1310 in server mother board, as single-end LVCMOS 50MHz input and output for FPGA system reference clock, but we don't find the input slew rate in datasheet, could you help to check it? thanks.
BR
Chi
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Hi Expert,
my customer is using CDCLVC1310 in server mother board, as single-end LVCMOS 50MHz input and output for FPGA system reference clock, but we don't find the input slew rate in datasheet, could you help to check it? thanks.
BR
Chi