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LMK04832-SP: Can the 4-wire SPI Readback work with multiple SPI devices?

Daniel Sugimura
Prodigy 150 points
Part Number: LMK04832-SP

For the LMK04832-SP, I'd like to use 4-wire SPI. When I configure the 4th wire for SPI readback with a push-pull type configuration, will the SPI readback signal go to high-impedance when chip select is disabled? Reason I am asking is because i'd like to bus a few more devices to this SPI and need to avoid contention. Thank you.

  • 0
    TI__Mastermind 18950 points

    Hi Daniel,

    My understanding is that the SPI readback pin will act as an additional SDO line and as such will go high-impedance when the device isn't selected. I have paged one of our experts to confirm.

    Best,

    Evan Su

  • +1
    TI__Mastermind 33790 points

    Daniel,

    The SDIO pin will tri-state after readback completes, but in 4-wire mode the alternate SDO pin will not tri-state. This is true even in open-drain I/O mode - it appears the output will continue to pull low as long as the last readback bit was a 0.

    If LMK04832-SP is the only device on the line, you could connect the SDIO pin to the SDO lines on a 4-wire connection and it would be functionally equivalent to a 4-wire configuration. This doesn't work if there are other devices on the SPI lines. Edit to add: this works if there are multiple LMK04832-SP and no other device types on the SPI bus as well. So if you need to talk to multiple LMK04832-SP, and nothing else, this scheme could work.

    Of course, you could insert some tri-state buffer or equivalent function between the SDO pin and your bus controller, or route a dedicated readback pin for the LMK04832-SP... but given the space-grade requirement, obviously this comes with some disadvantages.

    If you are not planning to use the CLKin_SELx pins for pin-mode control of the CLKin mux, you can use one of these pins for 4-wire SPI and spend an additional register transaction setting the pin type mux to the no pullup/pulldown input-type after readback is complete. I think the same should be true of PLL1_LD pin when used for CLKin2 external LOS - if this feature isn't used, PLL1_LD can also be set to the no pullup/pulldown input-type after readback is complete.

    I am looking into whether the reserved values that nominally map to input types on LMK04832-SP PLL2_LD could be used. Particularly if there is no circuitry connected to these pins, disclosing the reserved states as input types and recommending their use for tri-stating readback in 4-wire SPI mode could make more sense than the other pins. I'll let you know what I discover next week.

    Regards,

    Derek Payne

  • 0 in reply to Evan Su
    Prodigy 150 points

    Thank you Evan for following up!

  • 0 in reply to Derek Payne
    Prodigy 150 points

    Thank you Derek! That's good to know about the open-drain type as well.

    I think I'm going to proceed w/ changing the pin type to an input w/o the pullup/pulldown. I'll also look out for additional info from you on the reserved value if you discover something. Thank you!

  • 0 in reply to Daniel Sugimura
    TI__Mastermind 33790 points

    Daniel,

    I looked into the implementation, and indeed PLL2_LD_TYPE reserved values map to the same input behaviors as PLL1_LD_TYPE. If you write PLL2_LD_TYPE = 0, this will put the input stage into a tristate mode with no pull-up or pull-down, and there is no internal signal connected to this input. I'd recommend using this pin over any other pins for 4-wire readback, since this pin does not conflict with other input functions.

    Regards,

    Derek Payne

  • 0 in reply to Derek Payne
    Prodigy 150 points

    Thank you, Derek!