Hi,
I am using LMK04828SNKDTEP clock generator for Zynq US+ RFSoC RF section clocks. Due to shortage of I/Os in 3.3V banks of FPGA, I have to connect the SPI & reset controls of LMK to 1.8V bank which requires a bidirectional level translator in between. Will the Usage of a bidirectional level translator cause any issue? Please suggest.
Thanks & regards,
Ranjini.R